research direction, firmware:

• how do we program this chip?

Mounriver Studio & wch-link debugger

• how is the FPGA going to communicate this?

FPGA → MIPI LVDS Daughter → CH569 → CM5

16 bit parallel bus

• can we perform sensor fusion on this chip?

Examples:

HydraUSB dev board with open source firmware: https://hydrabus.com/hydrausb3-v1-0-specifications/?v=5435c69ed3bc

(In Chinese) CH569 minimal design & FPGA examples: https://www.wch.cn/bbs/thread-86805-1.html

Verilog HDL for 16-bit hspi (not designed for efinix):

FPGA_HSPI.v

EXM_HSPI.v

Translated PDF:

Untitled document.pdf

Translated Verilog files from verilog to systemverilog