research direction, firmware:
Mounriver Studio & wch-link debugger
FPGA → MIPI LVDS Daughter → CH569 → CM5
16 bit parallel bus
HydraUSB dev board with open source firmware: https://hydrabus.com/hydrausb3-v1-0-specifications/?v=5435c69ed3bc
(In Chinese) CH569 minimal design & FPGA examples: https://www.wch.cn/bbs/thread-86805-1.html
(Documentation, code examples?: https://github.com/openwch/ch569/tree/main/EVT/EXAM)
Verilog HDL for 16-bit hspi (not designed for efinix):
Translated PDF: